The Pi HAT controller is the second generation of the FPGA controller, now realized as a Pi HAT. The board has the following hardware components:
- 25K gate FPGA which can implement up to 4 independent repeater controllers. All data paths in the FPGA are digital.
- Analog port. A single channel analog port with signal conditioning and a dedicated CODEC for digital conversion, PTT and COR buffering.
- 8 Channel A/D signal conditioning. Provides buffering and an overvoltage crowbar for up to 8 analog inputs.
- RS232 interface. RS232 signal conversion for the pi serial port /dev/ttyAMA0.
- JTAG programming interface. Provision for connection of an external cable for programming and debug, duplicated at the PI so that the FPGA can be updated in place.
- ‘TopHAT’ expansion connector. An expansion connector to add additional analog ports, or an SDR based link transceiver.
- Pi HAT serial rom that conforms to the pi standard to provide hardware information, user ID and revision numbers.
- 2 programmable LED’s that can be used by the FPGA.
The software in the controller is split into three different layers, each in a different implementation language:
- FPGA Layer this layer implements an audio Codec, the basic repeater state machine, a DTMF decoder, the 8 channel A/D converter, a data modem, and ports for communication with the raspberry pi. This layer is written in the Verilog language and synthesized into logic gates.
- Pi Interface Layer this layer implements all the time-critical functions for audio processing for linking and phone patch purposes. It also provides ‘hooks’ for the application layer to access the hardware.
- Application Layer this layer implements a SIP client for phone patching and messaging, as well as an HTML based configuration server, and autonomous tasks for the phone patch, and A/D reporting. It also can accommodate plug-ins to handle custom remote tasks.
A block diagram of the software is shown below.